A/D Channel n Data Register. This register contains the result of the most recent conversion completed on channel n.
| RESERVED | Reserved, always 0. These bits always read as zeroes. |
| V_VREF | When DONE is 1, this field contains a binary fraction representing the voltage on the ADn pin, divided by the voltage on the VREF pin. Zero in the field indicates that the voltage on the ADn pin was less than, equal to, or close to that on VREF, while 0x3FF indicates that the voltage on AD input was close to, equal to, or greater than that on VREF. |
| RESERVED | These bits always read as zeroes. |
| OVERRUN | This bit is 1 in burst mode if the results of one or more conversions was (were) lost and overwritten before the conversion that produced the result in the V_VREF bits.This bit is cleared by reading this register. |
| DONE | This bit is set to 1 when an A/D conversion completes. It is cleared when this register is read. |